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| Author | : Yong Zhan |
| Publisher | : Now Publishers Inc |
| Total Pages | : 131 |
| Release | : 2008 |
| Genre | : Integrated circuits |
| ISBN | : 1601981708 |
Provides an overview of analysis and optimization techniques for thermally-aware chip design.
| Author | : Santanu Chattopadhyay |
| Publisher | : CRC Press |
| Total Pages | : 118 |
| Release | : 2018-04-24 |
| Genre | : Technology & Engineering |
| ISBN | : 1351227777 |
This book aims to highlight the research activities in the domain of thermal-aware testing. Thermal-aware testing can be employed both at circuit level and at system level Describes range of algorithms for addressing thermal-aware test issue, presents comparison of temperature reduction with power-aware techniques and include results on benchmark circuits and systems for different techniques This book will be suitable for researchers working on power- and thermal-aware design and the testing of digital VLSI chips
| Author | : Jun Yong Shin |
| Publisher | : |
| Total Pages | : 115 |
| Release | : 2015 |
| Genre | : |
| ISBN | : 9781321854763 |
Over the last few decades, chip performance has increased steadily due to continuous and aggressive technology scaling. However, it leaves chips quite vulnerable to several issues at the same time. High power densities in some particular areas spread across a chip might result in hotspots and thermal gradients, and these can lead to permanent damage to the chip and also can reduce the reliability of the entire system using the chip. As a result, a large number of dynamic thermal management (DTM) solutions have been proposed in recent years for use in multi-core architectures, and accurate temperature information over the entire chip area has become indispensable especially for fine-grain DTM solutions. Naturally, on-chip thermal sensors came to play an important role in providing accurate information on the thermal distribution of a chip, but there still remain some issues regarding the allocation of on-chip thermal sensors. Due to power, die area, and routing issues, it is preferable to limit the total number of on-chip thermal sensors on a die. Their placement also needs to be considered carefully in order to increase the accuracy of full-chip thermal profile reconstruction, especially when just a small number of thermal sensors can be deployed. In addition, it would be preferable to have some way to improve the reading accuracy of low power, small-sized on-chip thermal sensors that usually tend to have very limited accuracy in temperature readings. In this work, an issue will be firstly addressed regarding how to improve the reading accuracy of a low power, small-sized on-chip thermal sensor such as Ring-Oscillator (RO) based sensors at runtime on a software level. Secondly, a question of how to allocate a proper number of thermal sensors on a die in order to get the accurate full-chip scale temperature information on the run is addressed. Additionally, a temperature-aware routing method for global interconnects to minimize the signal propagation delay and also to reduce the probability of chip failure due to electromigration is presented at the end.
| Author | : Chong-Min Kyung |
| Publisher | : Springer Science & Business Media |
| Total Pages | : 295 |
| Release | : 2011-06-17 |
| Genre | : Science |
| ISBN | : 9400716796 |
Power consumption becomes the most important design goal in a wide range of electronic systems. There are two driving forces towards this trend: continuing device scaling and ever increasing demand of higher computing power. First, device scaling continues to satisfy Moore’s law via a conventional way of scaling (More Moore) and a new way of exploiting the vertical integration (More than Moore). Second, mobile and IT convergence requires more computing power on the silicon chip than ever. Cell phones are now evolving towards mobile PC. PCs and data centers are becoming commodities in house and a must in industry. Both supply enabled by device scaling and demand triggered by the convergence trend realize more computation on chip (via multi-core, integration of diverse functionalities on mobile SoCs, etc.) and finally more power consumption incurring power-related issues and constraints. Energy-Aware System Design: Algorithms and Architectures provides state-of-the-art ideas for low power design methods from circuit, architecture to software level and offers design case studies in three fast growing areas of mobile storage, biomedical and security. Important topics and features: - Describes very recent advanced issues and methods for energy-aware design at each design level from circuit and architecture to algorithm level, and also covering important blocks including low power main memory subsystem and on-chip network at architecture level - Explains efficient power conversion and delivery which is becoming important as heterogeneous power sources are adopted for digital and non-digital parts - Investigates 3D die stacking emphasizing temperature awareness for better perspective on energy efficiency - Presents three practical energy-aware design case studies; novel storage device (e.g., solid state disk), biomedical electronics (e.g., cochlear and retina implants), and wireless surveillance camera systems. Researchers and engineers in the field of hardware and software design will find this book an excellent starting point to catch up with the state-of-the-art ideas of low power design.
| Author | : Sung Kyu Lim |
| Publisher | : Springer Science & Business Media |
| Total Pages | : 573 |
| Release | : 2012-11-27 |
| Genre | : Technology & Engineering |
| ISBN | : 1441995420 |
This book provides readers with a variety of algorithms and software tools, dedicated to the physical design of through-silicon-via (TSV) based, three-dimensional integrated circuits. It describes numerous “manufacturing-ready” GDSII-level layouts of TSV-based 3D ICs developed with the tools covered in the book. This book will also feature sign-off level analysis of timing, power, signal integrity, and thermal analysis for 3D IC designs. Full details of the related algorithms will be provided so that the readers will be able not only to grasp the core mechanics of the physical design tools, but also to be able to reproduce and improve upon the results themselves. This book will also offer various design-for-manufacturability (DFM), design-for-reliability (DFR), and design-for-testability (DFT) techniques that are considered critical to the physical design process.
| Author | : Kanchan Manna |
| Publisher | : Springer Nature |
| Total Pages | : 167 |
| Release | : 2019-12-20 |
| Genre | : Technology & Engineering |
| ISBN | : 3030313107 |
This book covers various aspects of optimization in design and testing of Network-on-Chip (NoC) based multicore systems. It gives a complete account of the state-of-the-art and emerging techniques for near optimal mapping and test scheduling for NoC-based multicores. The authors describe the use of the Integer Line Programming (ILP) technique for smaller benchmarks and a Particle Swarm Optimization (PSO) to get a near optimal mapping and test schedule for bigger benchmarks. The PSO-based approach is also augmented with several innovative techniques to get the best possible solution. The tradeoff between performance (communication or test time) of the system and thermal-safety is also discussed, based on designer specifications. Provides a single-source reference to design and test for circuit and system-level approaches to (NoC) based multicore systems; Gives a complete account of the state-of-the-art and emerging techniques for near optimal mapping and test scheduling in (NoC) based multicore systems; Organizes chapters systematically and hierarchically, rather than in an ad hoc manner, covering aspects of optimization in design and testing of Network-on-Chip (NoC) based multicore systems.
| Author | : Sunil Kumar Muttoo |
| Publisher | : Springer |
| Total Pages | : 338 |
| Release | : 2018-05-15 |
| Genre | : Computers |
| ISBN | : 9811085331 |
This book comprises the select proceedings of the annual convention of the Computer Society of India. Divided into 10 topical volumes, the proceedings present papers on state-of-the-art research, surveys, and succinct reviews. The volumes cover diverse topics ranging from parallel processing to system buses, and from computer architecture to VLIW (very long instruction word). This book focuses on systems and architecture. It aims at informing the readers about those attributes of a system visible to a programmer. This book also deals with various innovations and improvements in computing technologies to improve the size, capacity and performance of modern-day computing systems. The contents of this book will be useful to professionals and researchers alike.
| Author | : |
| Publisher | : World Scientific |
| Total Pages | : 1397 |
| Release | : 2014-10-23 |
| Genre | : Technology & Engineering |
| ISBN | : 9814520241 |
remove This Encyclopedia comes in 3 sets. To check out Set 1 and Set 3, please visit Set 1: Thermal Packaging Techniques and Set 3: Thermal Packaging Applications /remove Thermal and mechanical packaging - the enabling technologies for the physical implementation of electronic systems - are responsible for much of the progress in miniaturization, reliability, and functional density achieved by electronic, microelectronic, and nanoelectronic products during the past 50 years. The inherent inefficiency of electronic devices and their sensitivity to heat have placed thermal packaging on the critical path of nearly every product development effort in traditional, as well as emerging, electronic product categories.Successful thermal packaging is the key differentiator in electronic products, as diverse as supercomputers and cell phones, and continues to be of pivotal importance in the refinement of traditional products and in the development of products for new applications. The Encyclopedia of Thermal Packaging, compiled in four multi-volume sets (Set 1: Thermal Packaging Techniques, Set 2: Thermal Packaging Tools, Set 3: Thermal Packaging Applications, and Set 4: Thermal Packaging Configurations) will provide a comprehensive, one-stop treatment of the techniques, tools, applications, and configurations of electronic thermal packaging. Each of the author-written sets presents the accumulated wisdom and shared perspectives of a few luminaries in the thermal management of electronics.Set 2: Thermal Packaging ToolsThe second set in the encyclopedia, Thermal Packaging Tools, includes volumes dedicated to thermal design of data centers, techniques and models for the design and optimization of heat sinks, the development and use of reduced-order “compact” thermal models of electronic components, a database of critical material thermal properties, and a comprehensive exploration of thermally-informed electronic design. The numerical and analytical techniques described in these volumes are among the primary tools used by thermal packaging practitioners and researchers to accelerate product and system development and achieve “correct by design” thermal packaging solutions.The four sets in the Encyclopedia of Thermal Packaging will provide the novice and student with a complete reference for a quick ascent on the thermal packaging ';learning curve,'; the practitioner with a validated set of techniques and tools to face every challenge, and researchers with a clear definition of the state-of-the-art and emerging needs to guide their future efforts. This encyclopedia will, thus, be of great interest to packaging engineers, electronic product development engineers, and product managers, as well as to researchers in thermal management of electronic and photonic components and systems, and most beneficial to undergraduate and graduate students studying mechanical, electrical, and electronic engineering.
| Author | : Mohamed M. Sabry |
| Publisher | : Now Pub |
| Total Pages | : 96 |
| Release | : 2014-01-27 |
| Genre | : Computers |
| ISBN | : 9781601987747 |
Temperature-Aware Design and Management for 3D Multi-Core Architectures surveys recent advances in temperature-aware 3D MPSoC considerations. It explores the recent advanced cooling strategies, thermal modeling frameworks, design-time optimizations and run-time thermal management schemes that are primarily targeted for 3D MPSoCs.
| Author | : Gabriela Nicolescu |
| Publisher | : CRC Press |
| Total Pages | : 453 |
| Release | : 2022-09-01 |
| Genre | : Technology & Engineering |
| ISBN | : 1000793370 |
In recent years, there has been a considerable amount of effort, both in industry and academia, focusing on the design, implementation, performance analysis, evaluation and prediction of silicon photonic interconnects for inter- and intra-chip communication, paving the way for the design and dimensioning of the next and future generation of high-performance computing systems. Photonic Interconnects for Computing Systems provides a comprehensive overview of the current state-of-the-art technology and research achievements in employing silicon photonics for interconnection networks and high-performance computing, summarizing main opportunities and some challenges. The majority of the chapters were collected from presentations made at the International Workshop on Optical/Photonic Interconnects for Computing Systems (OPTICS) held over the past two years. The workshop invites internationally recognized speakers on the range of topics relevant to silicon photonics and computing systems. Technical topics discussed in the book include:Design and Implementation of Chip-Scale Photonic Interconnects;Developing Design Automation Solutions for Chip-Scale Photonic Interconnects;Design Space Exploration in Chip-Scale Photonic Interconnects;Thermal Analysis and Modeling in Photonic Interconnects;Design for Reliability;Fabrication Non-Uniformity in Photonic Interconnects;Photonic Interconnects for Computing Systems presents a compilation of outstanding contributions from leading research groups in the field. It presents a comprehensive overview of the design, advantages, challenges, and requirements of photonic interconnects for computing systems. The selected contributions present important discussions and approaches related to the design and development of novel photonic interconnect architectures, as well as various design solutions to improve the performance of such systems while considering different challenges. The book is ideal for personnel in computer/photonic industries as well as academic staff and master/graduate students in computer science and engineering, electronic engineering, electrical engineering and photonics.
