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Integrating Bidirectional Brain-computer Interfaces in Low-voltage CMOS

Integrating Bidirectional Brain-computer Interfaces in Low-voltage CMOS
Author: John Uehlin
Publisher:
Total Pages: 69
Release: 2020
Genre:
ISBN:

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Realizations of small-form factor, ultra-low power bidirectional brain-computer interfaces (BBCIs) will enable treatment of chronic neurophysiological disorders and allow new modes to investigate brain function. Neural stimulators have been shown to effectively alleviate the symptoms of various neurological disorders, and development of closed-loop bidirectional neural interfaces will increase therapy effectiveness by adapting to real-time measurements. This dissertation studies implementation of neural interface functionality in a single chip consuming minimal power and silicon area with two novel techniques: a. Time-multiplexed, mixed-signal artifact cancellation for simultaneous stimulation and sensing; b. Compact integrated stimulators with on-chip resonant charge pumps. The following paragraphs enumerate the two proposed techniques and their associated challenges and advantages. First, integrated artifact cancellation allows uninterrupted recording of neural signals during stimulation pulses in adjacent tissue. Existing low-frequency signals can be preserved, and an artifact-immune recording system can quantify the body0́9s immediate response to stimulation. Cancelling artifacts is complicated by the magnitude difference between stimulation pulses and neural signals of interest. Stimulation artifacts are several orders of magnitude larger than the upper dynamic range of typical recording systems, so a canceller requires specialized front-end electronics. Stimulus artifact cancellation has been demonstrated with digital adaptive filters interfacing with a switched-capacitor analog recording front-end. On cue from the stimulator, the adaptive filter learns the artifact shape based on recording output and subtracts the full stimulus artifact waveform from the recording input. The technique was first prototyped with an FPGA-based adaptive filter interfacing with standalone recording and stimulation chips. Later, the algorithm was optimized for power-efficient operation over multiple stimulation and recording channels. It was then integrated into a multi-channel bidirectional interface capable of cancelling artifacts from four independent stimulators on four recording channels. The power-efficient canceller was fabricated in the 65nm TSMC low-power CMOS process, allowing use of low-voltage supplies for the calculation back-end. This enabled 60dB of artifact suppression with a full-scale limit of ±125mV while only consuming 49nW per channel. Second, effectively stimulating neural tissue through low form-factor electrodes requires high voltages to drive current through large electrode impedances. These stimulation voltages often exceed the maximum voltage ratings of the high-density CMOS technologies desired for compact neural interfaces. Stacked charge pumps are often used to generate large voltages with multiple low-voltage stages, protecting CMOS electronics. Standard charge pump implementations pump charge with large capacitors at low frequencies to maintain power efficiency. In these cases, charge pump capacitor area dominates the system size. The proposed stimulator uses resonant clocking techniques to maintain efficiency with small charge pump capacitors clocked at high frequencies. An integrated inductor creates a resonant tank with the charge pump capacitors, compensating for switching losses in the circuit. This technique was demonstrated in a multi-channel BBCI chip. Four independent differential stimulators were integrated with a 64-channel recording system and the previously mentioned artifact cancellation back-end in a 4mm2 65nm CMOS chip. The stimulators source up to 2mA of stimulation current with a range of ±11V. The internal charge pumps supply power with a DC-DC efficiency of 38%, as compared to the possible 6% of a theoretical non-resonant topology of equal size.


Brain-Machine Interface

Brain-Machine Interface
Author: Xilin Liu
Publisher: Springer
Total Pages: 268
Release: 2017-10-17
Genre: Technology & Engineering
ISBN: 3319679406

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This book provides an introduction to the emerging area of “Brain-Machine Interfaces,” with emphasis on the operation and practical design aspects. The book will help both electrical & bioengineers as well as neuroscience investigators to learn about the next generation brain-machine interfaces. The comprehensive review and design analysis will be very helpful for researchers who are new to this area or interested in the study of the brain. The in-depth discussion of practical design issues especially in animal experiments will also be valuable for experienced researchers.


High-Density Integrated Electrocortical Neural Interfaces

High-Density Integrated Electrocortical Neural Interfaces
Author: Sohmyung Ha
Publisher: Academic Press
Total Pages: 210
Release: 2019-08-03
Genre: Science
ISBN: 0128151161

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High-Density Integrated Electrocortical Neural Interfaces provides a basic understanding, design strategies and implementation applications for electrocortical neural interfaces with a focus on integrated circuit design technologies. A wide variety of topics associated with the design and application of electrocortical neural implants are covered in this book. Written by leading experts in the field— Dr. Sohmyung Ha, Dr. Chul Kim, Dr. Patrick P. Mercier and Dr. Gert Cauwenberghs —the book discusses basic principles and practical design strategies of electrocorticography, electrode interfaces, signal acquisition, power delivery, data communication, and stimulation. In addition, an overview and critical review of the state-of-the-art research is included. These methodologies present a path towards the development of minimally invasive brain-computer interfaces capable of resolving microscale neural activity with wide-ranging coverage across the cortical surface. Written by leading researchers in electrocorticography in brain-computer interfaces Offers a unique focus on neural interface circuit design, from electrode to interface, circuit, powering, communication and encapsulation Covers the newest ECoG interface systems and electrode interfaces for ECoG and biopotential sensing


Brain Machine Interfaces

Brain Machine Interfaces
Author: Lieuwe Leene
Publisher:
Total Pages:
Release: 2016
Genre:
ISBN:

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Brain-Machine Interface

Brain-Machine Interface
Author: Amir Zjajo
Publisher: Springer
Total Pages: 176
Release: 2016-03-30
Genre: Technology & Engineering
ISBN: 3319315412

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This book provides a complete overview of significant design challenges in respect to circuit miniaturization and power reduction of the neural recording system, along with circuit topologies, architecture trends, and (post-silicon) circuit optimization algorithms. The introduced novel circuits for signal conditioning, quantization, and classification, as well as system configurations focus on optimized power-per-area performance, from the spatial resolution (i.e. number of channels), feasible wireless data bandwidth and information quality to the delivered power of implantable system.


Bidirectional Integrated Neural Interface for Adaptive Cortical Stimulation

Bidirectional Integrated Neural Interface for Adaptive Cortical Stimulation
Author: Ruslana Shulyzki
Publisher:
Total Pages: 0
Release: 2010
Genre:
ISBN:

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This thesis presents the VLSI implementation and characterization of a 256-channel bidirectional integrated neural interface for adaptive cortical stimulation. The microsystem consists of 64 stimulation and 256 recording channels, implemented in a 0.35um CMOS technology with a cell pitch of 200um and total die size of 3.5mm x3.65mm. The stimulator is a current driver with an output current range of 20uA - 250uA. The current memory in every stimulator allows for simultaneous stimulation on multiple active channels. Circuit reuse in the stimulator and utilization of a single DAC yields a compact and low-power implementation. The recording channel has two stages of signal amplification and conditioning and a single-slope ADC. The measured input-referred noise is 7.99uVrms over a 5kHz bandwidth. The total power consumption is 13.3mW. A new approach to CMOS-microelectrode hybrid integration by on-chip Au multi-stud-bumping is also presented. It is validated by in vitro experimental measurements.


Implementing an Integrate-and-fire Neural Network on a Bidirectional Brain-computer Interface

Implementing an Integrate-and-fire Neural Network on a Bidirectional Brain-computer Interface
Author: Jonathan Mishler
Publisher:
Total Pages: 0
Release: 2022
Genre:
ISBN:

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There is a growing interest in using intracortical microstimulation (ICMS) as a means of neurorehabilitation, from using it to rewire synaptic connections in the brain, to providing a means of providing artificial sensations to provide feedback to patients controlling external devices such as robotic limbs via decoded neural activity. Towards the goal of neurorehabilitation, there have been recent efforts to integrate artificial neural networks (ANNs) with the brain and train them to manipulate neuronal activity in a context-specific manner with the goal of developing brain-computer interfaces (BCIs) that can restore function to damaged neural circuitry. In this thesis, I present my work whose aim was to interface artificial spiking neurons with biological neurons in primary motor cortex to create hybrid biological/artificial neural networks that altered the firing dynamics of the biological neurons. In these hybrid networks, spikes that are detected from the biological neurons send artificial postsynaptic potentials (PSPs) to the artificial neurons, whose magnitudes and polarities are defined by weights that characterize the strengths of their connections. When the membrane potentials of the artificial neurons exceed a predetermined threshold, they spike, and subsequently trigger ICMS to manipulate the activity of the biological neurons. We first characterize the effects of ICMS on neural activity in primary motor cortex (M1) of pigtail macaques, and show how it elicits a brief excitatory response followed by a longer inhibitory response. We then show how the probability of evoking single action potentials has at least three dependences – the stimulation amplitude, time delay between the neuron’s previous spike and stimulation onset, and its firing rate. Finally, we show how repetitive stimulation can increase or decrease the probability over time, likely due to mechanisms of short-term plasticity. I used these results to explore how various properties of the hybrid biological/artificial neural networks shape the closed-loop dynamics between the biological and artificial neurons. To do so, I measure changes in the auto-, and cross-correlograms of the biological neurons between their spontaneous and closed-loop dynamics, and show how features within the correlograms are related to the size, connectivity, number of hidden layers, magnitude of inhibition, and stimulation delays of the network. I then show how the closed-loop dynamics can be simulated by recording the spontaneous activity as well as the open-loop responses of the biological neurons to ICMS, and use the model to further characterize how the features of the hybrid network influence the closed-loop dynamics free from experimental constraints such as the non-stationarity of the firing rates and evoked spike probabilities of the biological neurons over time. I also use the model to explore how stimulation artifacts impacted the closed-loop operation of the hybrid neural network by obstructing the detection of spikes. To do so, I characterize the number of obstructed spikes as a function of both the network size and connection strength between the biological and artificial neurons. I found that compared to the size of the network, the strength of the connections between the biological and artificial neurons was the greater determinant of how many spikes were blanked. Lastly, I discuss preliminary work of the development of a computational model whose goal is to demonstrate that ANNs can be interfaced with the brain to restore lost motor function. I first train a small recurrent ANN, which simulates a motor circuit within the brain, to perform a 1D motor task with a reinforcement learning algorithm. I then lesion the network by deleting a subset of the neurons and their related connections, and show how even with retraining, the network is incapable of relearning the task. Finally, I discuss future steps in which a second ANN, whose outputs use ICMS to activate neurons within the original ANN, can be used to restore network function and task performance.


Wearable Electronics and Embedded Computing Systems for Biomedical Applications

Wearable Electronics and Embedded Computing Systems for Biomedical Applications
Author: Enzo Pasquale Scilingo
Publisher: MDPI
Total Pages: 255
Release: 2018-04-03
Genre: Mathematics
ISBN: 3038423866

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This book is a printed edition of the Special Issue "Wearable Electronics and Embedded Computing Systems for Biomedical Applications" that was published in Electronics


Microelectronic Implants for Central and Peripheral Nervous System: Overview of Circuit and System Technology

Microelectronic Implants for Central and Peripheral Nervous System: Overview of Circuit and System Technology
Author: Morris (Ming-Dou) Ker
Publisher: Frontiers Media SA
Total Pages: 162
Release: 2022-01-11
Genre: Science
ISBN: 2889740234

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Professor Ker is on the Board of Amazingneuron. The Other Topic Editors Declare no Competing Interests With Regards to the Research Topic Theme.


Wireless Interface Technologies for 3D IC and Module Integration

Wireless Interface Technologies for 3D IC and Module Integration
Author: Tadahiro Kuroda
Publisher: Cambridge University Press
Total Pages: 337
Release: 2021-09-30
Genre: Technology & Engineering
ISBN: 110884121X

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Synthesising fifteen years of research, this authoritative text provides a comprehensive treatment of two major technologies for wireless chip and module interface design, covering technology fundamentals, design considerations and tradeoffs, practical implementation considerations, and discussion of practical applications in neural network, reconfigurable processors, and stacked SRAM. It explains the design principles and applications of two near-field wireless interface technologies for 2.5-3D IC and module integration respectively, and describes system-level performance benefits, making this an essential resource for researchers, professional engineers and graduate students performing research in next-generation wireless chip and module interface design.