Finite Impulse Response Current Steering Radio Frequency Digital To Analog Converter For Digital If Transmitter Architecture PDF Download
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Author | : Shahin Mehdizad Taleie |
Publisher | : |
Total Pages | : 200 |
Release | : 2008 |
Genre | : Digital-to-analog converters |
ISBN | : |
Download Finite Impulse Response Current Steering Radio Frequency Digital to Analog Converter for Digital-IF Transmitter Architecture Book in PDF, ePub and Kindle
Author | : Mohammad Reza Sadeghifar |
Publisher | : Linköping University Electronic Press |
Total Pages | : 112 |
Release | : 2019-10-14 |
Genre | : |
ISBN | : 9176850307 |
Download Studies on Selected Topics in Radio Frequency Digital-to-Analog Converters Book in PDF, ePub and Kindle
The network latency in fifth generation mobile technology (5G) will be around one millisecond which is much lower than in 4G technology. This significantly faster response time together with higher information capacity and ultra-reliable communication in 5G technology will pave the way for future innovations in a smart and connected society. This new 5G network should be built on a reasonable wireless infrastructure and 5G radio base-stations that can be vastly deployed. That is, while the electrical specification of a radio base-station in 5G should be met in order to have the network functioning, the size, weight and power consumption of the radio system should be optimized to be able to commercially deploy these radios in a huge network. As the number of antenna elements increases in massive multiple-input multiple-output based radios such as in 5G, designing true multi-band base-station radios, with efficient physical size, power consumption and cost in emerging cellular bands especially in mid-bands (frequencies up to 10~GHz), is becoming a challenge. This demands a hard integration of radio components; particularly the radio's digital application-specific integrated circuits (ASIC) with high-performance energy-efficient multi-band data converters. In this dissertation radio frequency digital-to-analog converter (RF DAC) and semi-digital finite-impulse response (FIR) filter digital-to-analog converter has been studied. Different techniques are used in these structures to improve the transmitter's overall performance. In the RF DAC part, a radio frequency digital-to-analog converter solution is presented, which is capable of monolithic integration into today's digital ASIC due to its digital-in-nature architecture, while fulfills the stringent requirements of cellular network radio base station linearity and bandwidth. A voltage-mode conversion method is used as output stage, and configurable mixing logic is employed in the data path to create a higher frequency lobe and utilize the output signal in the first or the second Nyquist zone and hence achieving output frequencies up to the sample rate. In the semi-digital FIR part, optimization problem formulation for semi-digital FIR digital-to-analog converter is investigated. Magnitude and energy metrics with variable coefficient precision are defined for cascaded digital Sigma-Delta modulators, semi-digital FIR filter, and Sinc roll-off frequency response of the DAC. A set of analog metrics as hardware cost is also defined to be included in semi-digital FIR DAC optimization problem formulation. It is shown that hardware cost of the semi-digital FIR DAC, can be reduced by introducing flexible coefficient precision in filter optimization while the semi-digital FIR DAC is not over-designed either. Different use cases are selected to demonstrate the optimization problem formulations. A combination of magnitude metric, energy metric, coefficient precision and analog metric are used in different use cases of the optimization problem formulation and solved to find out the optimum set of analog FIR taps. Moreover, a direct digital-to-RF converter (DRFC) is presented in this thesis where a semi-digital FIR topology utilizes voltage-mode RF DAC cells to synthesize spectrally clean signals at RF frequencies. Due to its digital-in-nature design, the DRFC benefits from technology scaling and can be monolithically integrated into advance digital VLSI systems. A fourth-order single-bit quantizer bandpass digital Sigma-Delta modulator is used preceding the DRFC, resulting in a high in-band signal-to-noise ratio (SNR). The out-of-band spectrally-shaped quantization noise is attenuated by an embedded semi-digital FIR filter. The RF output frequencies are synthesized by a configurable voltage-mode RF DAC solution with a high linearity performance. A compensation technique to cancel the code-dependent supply current variation in voltage-mode RF DAC for radio frequency direct digital frequency synthesizer is also presented in this dissertation and is studied analytically. The voltage-mode RF DAC and the compensation technique are mathematically modeled and system-level simulation is performed to support the analytical discussion.
Author | : Yongping Han |
Publisher | : |
Total Pages | : 98 |
Release | : 2012 |
Genre | : Code division multiple access |
ISBN | : |
Download A CMOS Sigma-delta Digital Intermediate Frequency to Radio Frequency Transmitter Book in PDF, ePub and Kindle
During the last decades the development of the transistor and its continuous down-scaling allowed the appearance of cost effective wireless communication systems. New generation wideband wireless mobile systems demand high linearity, low power consumption and the low cost devices. Traditional RF systems are mainly analog-based circuitry. Contrary to digital circuits, the technology scaling results in reduction on the maximum voltage swing which makes RF design very challenging. Pushing the interface between the digital and analog boundary of the RF systems closer to the antenna becomes an attractive trend for modern RF devices. In order to take full advantages of the deep submicron CMOS technologies and digital signal processing (DSP), there is a strong trend towards the development of digital transmitter where the RF upconversion is part of the digital-to-analog conversion (DAC). This thesis presents a new digital intermediate frequency (IF) to RF transmitter for 2GHz wideband code division multiple access (W-CDMA). The proposed transmitter integrates a 3-level digital IF current-steering cell, an up-conversion mixer with a tuned load and an RF variable gain amplifier (RF VGA) with an embedded finite impulse response (FIR) reconstruction filter in the up-conversion path. A 4th-order 1.5-bit IF bandpass sigma delta modulator (BP SDM) is designed to support in-band SNR while the out-of-band quantization noise due to the noise shaping is suppressed by the embedded reconstruction filter to meet spectrum emission mask and ACPR requirements. The RF VGA provides 50dB power scaling in 10-dB steps with less than 1dB gain error. The design is fabricated in a 0.18um CMOS technology with a total core area of 0.8 x 1.6 mm2. The IC delivers 0dBm output power at 2GHz and it draws approximately 120mA from a 1.8V DC supply at the maximum output power. The measurement results proved that a digital-intensive digital IF to RF converter architecture can be successfully employed for WCDMA transmitter application.
Author | : Morteza S Alavi |
Publisher | : Academic Press |
Total Pages | : 304 |
Release | : 2016-11-18 |
Genre | : Technology & Engineering |
ISBN | : 0128025034 |
Download Radio-Frequency Digital-to-Analog Converters Book in PDF, ePub and Kindle
With the proliferation of wireless networks, there is a need for more compact, low-cost, power efficient transmitters that are capable of supporting the various communication standards, including Bluetooth, WLAN, GSM/EDGE, WCDMA and 4G of 3GPP cellular. This book describes a novel idea of RF digital-to-analog converters (RFDAC) and demonstrates how they can realize all-digital, fully-integrated RF transmitters that support all the current multi-mode and multi-band communication standards. With this book the reader will: Understand the challenges of realizing a universal CMOS RF transmitter Recognize the design issues and the advantages and disadvantages related to analog and digital transmitter architectures Master designing an RF transmitter from system level modeling techniques down to circuit designs and their related layout know-hows Grasp digital polar and I/Q calibration techniques as well as the digital predistortion approaches Learn how to generate appropriate digital I/Q baseband signals in order to apply them to the test chip and measure the RF-DAC performance. Highlights the benefits and implementation challenges of software-defined transmitters using CMOS technology Includes various types of analog and digital RF transmitter architectures for wireless applications Presents an all-digital polar RFDAC transmitter architecture and describes in detail its implementation Presents a new all-digital I/Q RFDAC transmitter architecture and its implementation Provides comprehensive design techniques from system level to circuit level Introduces several digital predistortion techniques which can be used in RF transmitters Describes the entire flow of system modeling, circuit simulation, layout techniques and the measurement process
Author | : Susan Luschas |
Publisher | : |
Total Pages | : 126 |
Release | : 2003 |
Genre | : |
ISBN | : |
Download Radio Frequency Digital to Analog Converter Book in PDF, ePub and Kindle
Dynamic performance of high speed, high resolution digital-to-analog converters (DACs) is limited by distortion at the data switching instants. Inter-symbol interference (ISI), imperfect timing synchronization and clock jitter are all culprits. A DAC output current controlled by an oscillating waveform is proposed to mitigate the effects of the switching distortion. The oscillating waveform should be a multiple (k*fs) of the sampling frequency (f), where k>l. The waveforms can be aligned so that the data switching occurs in the zero regions of the oscillating output. This makes the DAC insensitive to switch dynamics and jitter. The architecture has the additional benefit of mixing the DAC impulse response energy to a higher frequency. An image of a low IF input signal can therefore be output directly at a high IF or RF frequency for transmit communications applications. A narrow-band sigma-delta DAC with eight unit elements is chosen to demonstrate the radio frequency digital-to-analog converter (RF DAC) concept. A sigma-delta architecture allows the current source transistors to be smaller since mismatch shaping is employed. Smaller current source transistors have a lower drain capacitance, allowing large high frequency output impedance to be achieved without an extra cascode transistor. Elimination of the cascode reduces transistor headroom requirements and allows the DAC to be built with a 1.8V supply. The RF DAC prototype is targeted to GSM transmit specifications and implemented in 0.1 8ptm CMOS technology. Measured single-tone SFDR is -75dBc, SNR is 52dB, and IMD3 is -70.8dBc over a 17.5MHz bandwidth centered at 942.5MHz. Measured SNR has the predicted dependence on the phase alignment of the data clock and oscillating pulse.
Author | : |
Publisher | : |
Total Pages | : 850 |
Release | : 2008 |
Genre | : Dissertations, Academic |
ISBN | : |
Download Dissertation Abstracts International Book in PDF, ePub and Kindle
Author | : Gil Engel |
Publisher | : Elsevier Inc. Chapters |
Total Pages | : 31 |
Release | : 2013-05-13 |
Genre | : Technology & Engineering |
ISBN | : 0128064579 |
Download Advances in Analog and RF IC Design for Wireless Communication Systems Book in PDF, ePub and Kindle
This chapter discusses the practical application of RF digital-to-analog converters (RF DACs) to communication systems such as cable distribution, wireless communications infrastructure (WIFR) base stations, wireless backhaul, and other such systems. The key specifications that are driving the development of RF DAC technology are reviewed, as are some common radio architectures used to implement those systems. Challenges associated with the design of RF DACs are described, and some trade-offs and possible solutions are discussed. Design considerations of the package and the printed circuit board (PCB) design are reviewed. Measured results of an RF DAC suitable for cable head-end transmitters are presented. The features and performance of RF DACs provide an enabling solution for “Software Defined Radio” (SDR) systems targeted toward multi-carrier, multi-band, multi-standard radio transmitters.
Author | : Anuranjan Jha |
Publisher | : |
Total Pages | : 300 |
Release | : 2009 |
Genre | : |
ISBN | : |
Download Current-Steering Digital-to-Analog Converter Based Pulse Generation Techniques for Ultra-Wideband Pulse Radio Transmitter Book in PDF, ePub and Kindle
Author | : |
Publisher | : |
Total Pages | : |
Release | : 1997 |
Genre | : Dissertations, Academic |
ISBN | : |
Download Digital to Analog Converter with Integrated Finite Impulse Response Filter Book in PDF, ePub and Kindle
Author | : Konstantinos Doris |
Publisher | : Springer Science & Business Media |
Total Pages | : 230 |
Release | : 2006-03-07 |
Genre | : Technology & Engineering |
ISBN | : 9780387304151 |
Download Wide-Bandwidth High Dynamic Range D/A Converters Book in PDF, ePub and Kindle
Wide-bandwidth high dynamic range Digital to Analog Converters (D/A) are essential elements of modern systems, e.g. multi-carrier communication systems. Current Steering D/A converters offer the potential to achieve high dynamic range for wide frequency bandwidths, however, their performance at higher frequencies is usually limited by strong nonlinear behavior. This behavior is not well understood and impedes performance progress. Wide-Bandwidth High Dynamic Range D/A Converters presents a structured description of the operation principles and the nonlinear behavior of Current Steering D/A Converters, and shows ways to deal with it in the design phase. The book provides the reader a thorough understanding of error mechanisms at high frequencies. It explains their effects and shows their dependencies with parameters of the processed signal, the architecture, its circuit blocks and their implementations. A highlight of the book is the detailed treatment of timing errors caused by circuit imperfections due to process mismatch and clock interconnects. The book follows a unique approach, building an analysis and synthesis framework of concepts with a generic scope beyond the current steering architecture. The concepts are tested in practice with the design and measurements of a high performance 12b 500MSample/sec Current Steering Digital to Analog Converter realized in 0.18m m CMOS.