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| Author | : Tae-Hyoung Kim |
| Publisher | : |
| Total Pages | : 386 |
| Release | : 2009 |
| Genre | : |
| ISBN | : |
| Author | : Alice Wang |
| Publisher | : Springer Science & Business Media |
| Total Pages | : 218 |
| Release | : 2006-12-11 |
| Genre | : Technology & Engineering |
| ISBN | : 0387345019 |
Based on the work of MIT graduate students Alice Wang and Benton Calhoun, this book surveys the field of sub-threshold and low-voltage design and explores such aspects of sub-threshold circuit design as modeling, logic and memory circuit design. One important chapter of the book is dedicated to optimizing energy dissipation - a key metric for energy constrained designs. This book also includes invited chapters on the subject of analog sub-threshold circuits.
| Author | : Joseph A. Crop |
| Publisher | : |
| Total Pages | : 197 |
| Release | : 2014 |
| Genre | : Low voltage integrated circuits |
| ISBN | : |
Energy consumption is one of the primary bottlenecks to both large and small scale modern compute platforms. Reducing the operating voltage of digital circuits to voltages where the supply voltage is near or below the threshold of the transistors has recently gained attention as a method to reduce the energy required for computations by as much as 6 times. However, when operating at near/sub-threshold voltages (where the supply voltage is near or below the threshold of the transistors), imperfections in transistor manufacturing, changes in temperature, and other difficult-to-predict factors cause wide variations in the timing of Complementary Metal-Oxide Semiconductor (CMOS) circuits due to an increased sensitivity at lower voltages. These increased variations result in poor aggregate performance and cause increased rates of error occurrence in computation. This work introduces several new methods to improve the reliability of near/sub-threshold circuits. The first is a design automation technique that is used to aid in low-voltage digital standard cell synthesis. Second, two circuit-level techniques are also introduced that aim to improve the reliability and resiliency of digital circuits by means of completion/error detection. These techniques are shown to improve speed and lower energy consumption at low overheads compared to previous methods. Most importantly, these circuit-level methods are specifically designed to operate at low voltages and can themselves tolerate variations and operation in harsh environments. Finally, a test-chip prototype designed in 65nm-CMOS demonstrates the practicality and feasibility of a proposed current sensing error detector.
| Author | : Rohit Dhiman |
| Publisher | : Springer |
| Total Pages | : 122 |
| Release | : 2014-11-07 |
| Genre | : Technology & Engineering |
| ISBN | : 813222132X |
The book provides a detailed analysis of issues related to sub-threshold interconnect performance from the perspective of analytical approach and design techniques. Particular emphasis is laid on the performance analysis of coupling noise and variability issues in sub-threshold domain to develop efficient compact models. The proposed analytical approach gives physical insight of the parameters affecting the transient behavior of coupled interconnects. Remedial design techniques are also suggested to mitigate the effect of coupling noise. The effects of wire width, spacing between the wires, wire length are thoroughly investigated. In addition, the effect of parameters like driver strength on peak coupling noise has also been analyzed. Process, voltage and temperature variations are prominent factors affecting sub-threshold design and have also been investigated. The process variability analysis has been carried out using parametric analysis, process corner analysis and Monte Carlo technique. The book also provides a qualitative summary of the work reported in the literature by various researchers in the design of digital sub-threshold circuits. This book should be of interest for researchers and graduate students with deeper insights into sub-threshold interconnect models in particular. In this sense, this book will best fit as a text book and/or a reference book for students who are initiated in the area of research and advanced courses in nanotechnology, interconnect design and modeling.
| Author | : Armin Tajalli |
| Publisher | : Springer Science & Business Media |
| Total Pages | : 300 |
| Release | : 2010-09-14 |
| Genre | : Technology & Engineering |
| ISBN | : 1441964789 |
Design exibility and power consumption in addition to the cost, have always been the most important issues in design of integrated circuits (ICs), and are the main concerns of this research, as well. Energy Consumptions: Power dissipation (P ) and energy consumption are - diss pecially importantwhen there is a limited amountof power budgetor limited source of energy. Very common examples are portable systems where the battery life time depends on system power consumption. Many different techniques have been - veloped to reduce or manage the circuit power consumption in this type of systems. Ultra-low power (ULP) applications are another examples where power dissipation is the primary design issue. In such applications, the power budget is so restricted that very special circuit and system level design techniquesare needed to satisfy the requirements. Circuits employed in applications such as wireless sensor networks (WSN), wearable battery powered systems [1], and implantable circuits for biol- ical applications need to consume very low amount of power such that the entire system can survive for a very long time without the need for changingor recharging battery[2–4]. Using newpowersupplytechniquessuchas energyharvesting[5]and printable batteries [6], is another reason for reducing power dissipation. Devel- ing special design techniques for implementing low power circuits [7–9], as well as dynamic power management (DPM) schemes [10] are the two main approaches to control the system power consumption. Design Flexibility: Design exibility is the other important issue in modern in- grated systems.
| Author | : Michael Hübner |
| Publisher | : Springer |
| Total Pages | : 105 |
| Release | : 2015-11-14 |
| Genre | : Technology & Engineering |
| ISBN | : 3319233890 |
This book explores near-threshold computing (NTC), a design-space using techniques to run digital chips (processors) near the lowest possible voltage. Readers will be enabled with specific techniques to design chips that are extremely robust; tolerating variability and resilient against errors. Variability-aware voltage and frequency allocation schemes will be presented that will provide performance guarantees, when moving toward near-threshold manycore chips. · Provides an introduction to near-threshold computing, enabling reader with a variety of tools to face the challenges of the power/utilization wall; · Demonstrates how to design efficient voltage regulation, so that each region of the chip can operate at the most efficient voltage and frequency point; · Investigates how performance guarantees can be ensured when moving towards NTC manycores through variability-aware voltage and frequency allocation schemes.
| Author | : Benton Highsmith Calhoun |
| Publisher | : |
| Total Pages | : 202 |
| Release | : 2005 |
| Genre | : |
| ISBN | : |
(Cont.) A programmable FIR filter test chip fabricated in 0.18pum bulk CMOS provides measurements to confirm the model and the sizing analysis. Third, a low-overhead method for integrating sub-threshold operation with high performance applications extends dynamic voltage scaling across orders of magnitude of frequency and provides energy scalability down to the minimum energy point. A 90nm bulk CMOS test chip confirms the range of operation for ultra-dynamic voltage scaling. Finally, sub-threshold operation is extended to memories. Analysis of traditional SRAM bitcells and architectures leads to development of a new bitcell for robust sub-threshold SRAM operation. The sub-threshold SRAM is analyzed experimentally in a 65nm bulk CMOS test chip.
| Author | : Swarup Bhunia |
| Publisher | : Springer Science & Business Media |
| Total Pages | : 444 |
| Release | : 2010-11-10 |
| Genre | : Technology & Engineering |
| ISBN | : 1441974180 |
Design considerations for low-power operations and robustness with respect to variations typically impose contradictory requirements. Low-power design techniques such as voltage scaling, dual-threshold assignment and gate sizing can have large negative impact on parametric yield under process variations. This book focuses on circuit/architectural design techniques for achieving low power operation under parameter variations. We consider both logic and memory design aspects and cover modeling and analysis, as well as design methodology to achieve simultaneously low power and variation tolerance, while minimizing design overhead. This book will discuss current industrial practices and emerging challenges at future technology nodes.
| Author | : Andrew Masami Abo |
| Publisher | : |
| Total Pages | : 276 |
| Release | : 1999 |
| Genre | : |
| ISBN | : |
| Author | : Sajib Roy |
| Publisher | : LAP Lambert Academic Publishing |
| Total Pages | : 88 |
| Release | : 2011-08 |
| Genre | : |
| ISBN | : 9783845444932 |
The book focuses on the applicability of sub-threshold source coupled logic ( STSCL ) for implementing digital circuits and systems that runs at very low voltage and promise to provide desirable performance with excellent energy savings for Sectors like bio-engineering and smart sensors development where energy consumption is required to be effectively low for longer battery life. Alongside achieving ultra-low power specification, the system must also be reliable, robust and perform under harsh conditions. In this paper logic gates are designed and analyzed, using STSCL, for implementation of digital sections in small sized smart-dust sensors which should operate at very small supply and consume extremely low power.
