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Smart and Flexible Digital-to-Analog Converters

Smart and Flexible Digital-to-Analog Converters
Author: Georgi Radulov
Publisher: Springer Science & Business Media
Total Pages: 302
Release: 2011-01-07
Genre: Technology & Engineering
ISBN: 9400703473

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Smart and Flexible Digital-to-Analog Converters proposes new concepts and implementations for flexibility and self-correction of current-steering digital-to-analog converters (DACs) which allow the attainment of a wide range of functional and performance specifications, with a much reduced dependence on the fabrication process. DAC linearity is analysed with respect to the accuracy of the DAC unit elements. A classification is proposed of the many different current-steering DAC correction methods. The classification reveals methods that do not yet exist in the open literature. Further, this book systematically analyses self-calibration correction methods for the various DAC mismatch errors. For instance, efficient calibration of DAC binary currents is identified as an important missing method. This book goes on to propose a new methodology for correcting mismatch errors of both nominally identical unary as well as scaled binary DAC currents. A new concept for DAC flexibility is presented. The associated architecture is based on a modular design approach that uses parallel sub-DAC units to realize flexible design, functionality and performance. Two main concepts, self-calibration and flexibility, are demonstrated in practice using three DAC testchips in 250nm, 180nm and 40nm standard CMOS. Smart and Flexible Digital-to-Analog Converters will be useful to both advanced professionals and newcomers in the field. Advanced professionals will find new methods that are fully elaborated from analysis at conceptual level to measurement results at test-chip level. New comers in the field will find structured knowledge of fully referenced state-of-the art methods with many fully explained novelties.“/p> DAC linearity is analysed with respect to the accuracy of the DAC unit elements. A classification is proposed of the many different current-steering DAC correction methods. The classification reveals methods that do not yet exist in the open literature. Further, this book systematically analyses self-calibration correction methods for the various DAC mismatch errors. For instance, efficient calibration of DAC binary currents is identified as an important missing method. This book goes on to propose a new methodology for correcting mismatch errors of both nominally identical unary as well as scaled binary DAC currents. A new concept for DAC flexibility is presented. The associated architecture is based on a modular design approach that uses parallel sub-DAC units to realize flexible design, functionality and performance. Two main concepts, self-calibration and flexibility, are demonstrated in practice using three DAC testchips in 250nm, 180nm and 40nm standard CMOS. Smart and Flexible Digital-to-Analog Converters will be useful to both advanced professionals and newcomers in the field. Advanced professionals will find new methods that are fully elaborated from analysis at conceptual level to measurement results at test-chip level. New comers in the field will find structured knowledge of fully referenced state-of-the art methods with many fully explained novelties. This book goes on to propose a new methodology for correcting mismatch errors of both nominally identical unary as well as scaled binary DAC currents. A new concept for DAC flexibility is presented. The associated architecture is based on a modular design approach that uses parallel sub-DAC units to realize flexible design, functionality and performance. Two main concepts, self-calibration and flexibility, are demonstrated in practice using three DAC testchips in 250nm, 180nm and 40nm standard CMOS. Smart and Flexible Digital-to-Analog Converters will be useful to both advanced professionals and newcomers in the field. Advanced professionals will find new methods that are fully elaborated from analysis at conceptual level to measurement results at test-chip level. New comers in the field will find structured knowledge of fully referenced state-of-the art methods with many fully explained novelties. Two main concepts, self-calibration and flexibility, are demonstrated in practice using three DAC testchips in 250nm, 180nm and 40nm standard CMOS. Smart and Flexible Digital-to-Analog Converters will be useful to both advanced professionals and newcomers in the field. Advanced professionals will find new methods that are fully elaborated from analysis at conceptual level to measurement results at test-chip level. New comers in the field will find structured knowledge of fully referenced state-of-the art methods with many fully explained novelties.


Direction, Alignment, Commitment

Direction, Alignment, Commitment
Author: Cynthia McCauley
Publisher:
Total Pages: 0
Release: 2024-04-17
Genre: Business & Economics
ISBN: 9781647611170

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This book will show you how to diagnose problems in your team by focusing on the three outcomes of effective leadership: direction, alignment, and commitment.


Integrated Analog-To-Digital and Digital-To-Analog Converters

Integrated Analog-To-Digital and Digital-To-Analog Converters
Author: Rudy J. van de Plassche
Publisher: Springer Science & Business Media
Total Pages: 535
Release: 2012-12-06
Genre: Technology & Engineering
ISBN: 1461527481

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Analog-to-digital (A/D) and digital-to-analog (D/A) converters provide the link between the analog world of transducers and the digital world of signal processing, computing and other digital data collection or data processing systems. Several types of converters have been designed, each using the best available technology at a given time for a given application. For example, high-performance bipolar and MOS technologies have resulted in the design of high-resolution or high-speed converters with applications in digital audio and video systems. In addition, high-speed bipolar technologies enable conversion speeds to reach the gigaHertz range and thus have applications in HDTV and digital oscilloscopes. Integrated Analog-to-Digital and Digital-to-Analog Converters describes in depth the theory behind and the practical design of these circuits. It describes the different techniques to improve the accuracy in high-resolution A/D and D/A converters and also special techniques to reduce the number of elements in high-speed A/D converters by repetitive use of comparators. Integrated Analog-to-Digital and Digital-to-Analog Converters is the most comprehensive book available on the subject. Starting from the basic elements of theory necessary for a complete understanding of the design of A/D and D/A converters, this book describes the design of high-speed A/D converters, high-accuracy D/A and A/D converters, sample-and-hold amplifiers, voltage and current reference sources, noise-shaping coding and sigma-delta converters. Integrated Analog-to-Digital and Digital-to-Analog Converters contains a comprehensive bibliography and index and also includes a complete set of problems. This book is ideal for use in an advanced course on the subject and is an essential reference for researchers and practicing engineers.


Dynamic-Mismatch Mapping for Digitally-Assisted DACs

Dynamic-Mismatch Mapping for Digitally-Assisted DACs
Author: Yongjian Tang
Publisher: Springer Science & Business Media
Total Pages: 170
Release: 2013-02-11
Genre: Technology & Engineering
ISBN: 1461412501

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This book describes a novel digital calibration technique called dynamic-mismatch mapping (DMM) to improve the performance of digital to analog converters (DACs). Compared to other techniques, the DMM technique has the advantage of calibrating all mismatch errors without any noise penalty, which is particularly useful in order to meet the demand for high performance DACs in rapidly developing applications, such as multimedia and communication systems.


Switched-capacitor DACs Using Open Loop Output Drivers and Digital Predistortion

Switched-capacitor DACs Using Open Loop Output Drivers and Digital Predistortion
Author: Clayton Hollis Daigle
Publisher: Stanford University
Total Pages: 170
Release: 2010
Genre:
ISBN:

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High-speed communication systems, such as the 10 Gb/s Ethernet standard for copper cabling (10GBASE-T), use digital signal processing (DSP) to overcome the noise and bandwidth constraints of communication channels and, thereby, improve network throughput. The sophistication of these DSP techniques is possible because engineers can implement them using very little area and power in modern CMOS processes. And as CMOS technology scales, the power and area costs of digital logic become even more favorable. The requirements of communication systems also put pressure on circuit designers to develop higher-fidelity, higher-speed digital-to-analog converters (DACs). Unfortunately in this case, CMOS technology scaling offers a mixed bag of trends: some favorable to the most prevalent techniques used in DAC design and others unfavorable. The research presented in this dissertation is an attempt to let CMOS scaling trends guide the DAC design process. To this end, we have developed a new DAC architecture that relies on DSP to overcome some of the limitations encountered in analog and mixed signal design. The architecture consists of a digital predistortion block, a switched-capacitor DAC core, an open-loop output driver, a calibration ADC and a calibration algorithm. During normal operation, the predistortion block operates on the input data stream in such a way that nonlinearties in the DAC core and open-loop output driver are cancelled. Because these nonlinearities can change over time, the calibration ADC monitors the DAC output in the background, allowing the calibration algorithm to continuously update the predistortion coefficients. The predistortion block is implemented as a lookup table that re-maps each input sample to a unique internal value. This allows the predistorter to consume low power, but it also limits the kinds of errors that can be cancelled. Only memoryless nonlinearities, which are nonlinearities that are not a function of signal frequency, can be corrected. Existing DAC architectures are not good candidates for this kind of correction because their performance varies significantly across frequency. Therefore, the architecture that we have developed was designed so that its dominant nonlinearity mechanisms are approximately memoryless relative to the frequencies of interest. A 12-bit, 800-MS/s prototype chip demonstrating the new architecture was fabricated in a 90-nm CMOS process. The prototype achieves better than 58 dB SFDR for signal frequencies below 200 MHz and better than 53 dB SFDR for signal frequencies below 400 MHz. The full-scale output current is 16 mA, but by changing the resistive load seen by the DAC, we tested output voltage swings from 0.65 Vppd to 2.9 Vppd. We could discern no difference in SFDR performance for large or small output voltage swings.


The Linotype Bulletin

The Linotype Bulletin
Author:
Publisher:
Total Pages: 290
Release: 1924
Genre: Linotype
ISBN:

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Education pamphlets

Education pamphlets
Author:
Publisher:
Total Pages: 730
Release: 1914
Genre:
ISBN:

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Report

Report
Author: Massachusetts. Dept. of Labor and Industries. Division of Statistics
Publisher:
Total Pages: 498
Release: 1884
Genre: Labor
ISBN:

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