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| Author | : Ken Gilleo |
| Publisher | : McGraw-Hill Professional Publishing |
| Total Pages | : 232 |
| Release | : 2004 |
| Genre | : Technology & Engineering |
| ISBN | : |
This engineering reference covers new techniques in electronic packaging - flip chip, BGA, and MEMs. It includes high density packaging and cleaning options.
| Author | : Ken Gilleo |
| Publisher | : McGraw Hill Professional |
| Total Pages | : 832 |
| Release | : 2002 |
| Genre | : Business & Economics |
| ISBN | : |
*Covers design, packaging, construction, assembly, and application of all three approaches to Area Array Packaging: Ball Grid Array (BGA), Chip Scale Package (CSP), and Flip Chip (FC) *Details the pros and cons of each technology with varying applications *Examines packaging ramifications of high density interconnects (HDI)
| Author | : Karl J. Puttlitz |
| Publisher | : Springer Science & Business Media |
| Total Pages | : 1250 |
| Release | : 2012-12-06 |
| Genre | : Technology & Engineering |
| ISBN | : 1461513898 |
Microelectronic packaging has been recognized as an important "enabler" for the solid state revolution in electronics which we have witnessed in the last third of the twentieth century. Packaging has provided the necessary external wiring and interconnection capability for transistors and integrated circuits while they have gone through their own spectacular revolution from discrete device to gigascale integration. At IBM we are proud to have created the initial, simple concept of flip chip with solder bump connections at a time when a better way was needed to boost the reliability and improve the manufacturability of semiconductors. The basic design which was chosen for SLT (Solid Logic Technology) in the 1960s was easily extended to integrated circuits in the '70s and VLSI in the '80s and '90s. Three I/O bumps have grown to 3000 with even more anticipated for the future. The package families have evolved from thick-film (SLT) to thin-film (metallized ceramic) to co-fired multi-layer ceramic. A later family or ceramics with matching expansivity to sili con and copper internal wiring was developed as a predecessor of the chip interconnection revolution in copper, multilevel, submicron wiring. Powerful server packages have been de veloped in which the combined chip and package copper wiring exceeds a kilometer. All of this was achieved with the constant objective of minimizing circuit delays through short, efficient interconnects.
| Author | : Ken Gilleo |
| Publisher | : McGraw-Hill |
| Total Pages | : 272 |
| Release | : 2003-10 |
| Genre | : Technology & Engineering |
| ISBN | : 9780071738019 |
This engineering reference covers the most important solders and materials in modern electronic packaging. Written by a team of world-class professionals and researchers, Area Array Packaging Materials includes vital information necessary for the design of cutting-edge electronics products.
| Author | : William Greig |
| Publisher | : Springer Science & Business Media |
| Total Pages | : 312 |
| Release | : 2007-04-24 |
| Genre | : Technology & Engineering |
| ISBN | : 0387339132 |
Reviewing the various IC packaging, assembly, and interconnection technologies, this professional reference provides an overview of the materials and the processes, as well as the trends and available options that encompass electronic manufacturing. It covers both the technical issues and touches on some of the reliability concerns with the various technologies applicable to packaging and assembly of the IC. The book discusses the various packaging approaches, assembly options, and essential manufacturing technologies, among other relevant topics.
| Author | : Lászlo Roth |
| Publisher | : John Wiley & Sons |
| Total Pages | : 850 |
| Release | : 2012-12-07 |
| Genre | : Design |
| ISBN | : 1118420845 |
The essential packaging design resource, now with more patterns than ever! For more than two decades, The Packaging Designer's Book of Patterns has served as an indispensable source of ideas and practical solutions for a wide range of packaging design challenges. This Fourth Edition offers more than 600 patterns and structural designs—more than any other book—all drawn to scale and ready to be traced, scanned, or photocopied. Online access to the patterns in digital format allows readers to immediately use any pattern in the most common software programs, including Adobe Photoshop and Illustrator. Every pattern has been test-constructed to verify dimensional accuracy. The patterns can be scaled to suit particular specifications—many are easily converted to alternate uses—and most details are easily customizable. Features of this Fourth Edition include: More than 55 new patterns added to this edition—over 600 patterns in all A broad array of patterns for folding cartons, trays, tubes, sleeves, wraps, folders, rigid boxes, corrugated containers, and point-of-purchase displays Proven, scalable patterns that save hours of research and trial-and-error design Packaging patterns that are based on the use of 100% recyclable materials Includes access to a password protected website that contains all 600+ patterns in digital form for immediate use Comprehensive and up to date, The Packaging Designer's Book of Patterns, Fourth Edition enables packaging, display, and graphic designers and students to achieve project-specific design objectives with precision and confidence.
| Author | : Rao Tummala |
| Publisher | : Springer Science & Business Media |
| Total Pages | : 662 |
| Release | : 1997-01-31 |
| Genre | : Computers |
| ISBN | : 9780412084515 |
This thoroughly revised and updated three volume set continues to be the standard reference in the field, providing the latest in microelectronics design methods, modeling tools, simulation techniques, and manufacturing procedures. Unlike reference books that focus only on a few aspects of microelectronics packaging, these outstanding volumes discuss state-of-the-art packages that meet the power, cooling, protection, and interconnection requirements of increasingly dense and fast microcircuitry. Providing an excellent balance of theory and practical applications, this dynamic compilation features step-by-step examples and vital technical data, simplifying each phase of package design and production. In addition, the volumes contain over 2000 references, 900 figures, and 250 tables. Part I: Technology Drivers covers the driving force of microelectronics packaging - electrical, thermal, and reliability. It introduces the technology developer to aspects of manufacturing that must be considered during product development. Part II: Semiconductor Packaging discusses the interconnection of the IC chip to the first level of packaging and all first level packages. Electrical test, sealing, and encapsulation technologies are also covered in detail. Part III: Subsystem Packaging explores board level packaging as well as connectors, cables, and optical packaging.
| Author | : Michael Pecht |
| Publisher | : CRC Press |
| Total Pages | : 844 |
| Release | : 2018-10-24 |
| Genre | : Technology & Engineering |
| ISBN | : 1351829971 |
Both a handbook for practitioners and a text for use in teaching electronic packaging concepts, guidelines, and techniques. The treatment begins with an overview of the electronics design process and proceeds to examine the levels of electronic packaging and the fundamental issues in the development
| Author | : Raminderpal Singh |
| Publisher | : John Wiley & Sons |
| Total Pages | : 484 |
| Release | : 2001-12-12 |
| Genre | : Technology & Engineering |
| ISBN | : 0471150428 |
"...offers a tutorial guide to IC designers who want to move to the next level of chip design by unlocking the secrets of signal integrity." —Jake Buurma, Senior Vice President, Worldwide Research & Development, Cadence Design Systems, Inc. Covers signal integrity effects in high performance Radio Frequency (RF) IC Brings together research papers from the past few years that address the broad range of issues faced by IC designers and CAD managers now and in the future A Wiley-IEEE Press publication
| Author | : Ephraim Suhir |
| Publisher | : CRC Press |
| Total Pages | : 344 |
| Release | : 2021-01-28 |
| Genre | : Technology & Engineering |
| ISBN | : 0429863829 |
Avoiding Inelastic Strains in Solder Joint Interconnections of IC Devices addresses analytical (mathematical) modeling approaches aimed at understanding the underlying physics and mechanics of the behavior and performance of solder materials and solder joint interconnections of IC devices. The emphasis is on design for reliability, including probabilistic predictions of the solder lifetime. Describes how to use the developed methods of analytical predictive modeling to minimize thermal stresses and strains in solder joint of IC devices Shows how to build the preprocessing models in finite-element analyses (FEA) by comparing the FEA and analytical data Covers how to design the most effective test vehicles for testing solder joints Details how to design and organize, in addition to or sometimes even instead of highly accelerated life tests (HALT), highly focused and highly cost-effective failure oriented accelerated testing (FOAT) to understand the physic of failure of solder joint interconnections Outlines how to convert the low cycle fatigue conditions into elastic fatigue conditions and to assess the fatigue lifetime in such cases Illustrates ways to replace time- and labor-consuming, expensive, and possibly misleading temperature cycling tests with simpler and physically meaningful accelerated tests This book is aimed towards professionals in electronic and photonic packaging, electronic and optical materials, materials engineering, and mechanical design.
