A Study Of Novel Fabrication Techniques For Development Of 3 D Silicon Nano Structure Array PDF Download

Self-assembled nanowires chemically synthesized by bottom-up approaches have attracted considerable attention due to their properties that are not common in their bulk or thin film counterparts. Their potential to offer novel functionality opens up opportunities for innovative genres of devices. Indeed, a number of innovative devices, such as transistors, diodes, bio/chemical sensors, photovoltaic devices, and even embryonic low-density integrated circuits, have been demonstrated by using various kinds of nanowires. In contrast to nanostructured materials created by the microfabrication technology pursued by the microelectronics industry, self-assembled nanowires inheritedly exhibit a high degree of variability in their dimensions, densities, locations, and alignment, etc. Despite the promise of nanowires, such uncertainty prevents them from utilization in mass-manufacturing processes and large-scale device integration. This dissertation aimed to devise a viable and high-throughput growth-in-place technique for creating well-ordered nanowire arrays without costly and tedious post-growth processing. This dissertation also intended to demonstrate novel devices using the nanobridges created by the growth-in-place technique and nanowire ensembles. In the first section of the dissertation, a couple of popular modalities for creating nanowire devices, including growth-in-place techniques, were briefly reviewed to improve our understanding of their various aspects. Among multiple bottom-up growth techniques, a revised nanobridging technique with new process recipes for depositing catalytic gold nanoparticles was explored to enhance its repeatability and throughput. Yields of the nanobridges were improved with the new schemes such as adding HF acid to nanoparticle colloid and employing a surface linker treatment on the substrate for catalyst deposition while maintaining deposition selectivity. This dissertation demonstrated that Si nanobridges could become building blocks of 3D gate-all-around FETs, charge-trap nonvolatile memory devices, and photosensitive transistors. Here, high yields of the nanobridges with improved arrangement allowed integration of multiple devices per batch. The nanobridge FETs showed successful switching characteristics, and the nanobridge memory devices showed low voltage programming/erasing operations due to the enhanced electric fields exerted by the surround gate. High photosensitivity of the off currents of the nanobridge MOSFET offered an opportunity to create novel electro-optical switching devices. Although these bridge devices exhibited proof-of-concept level performance and needed far more optimization for attaining competitive performance, they showed the feasibility of expanding the realm of nanobridge applications. Other than exploring the bottom-up approach of synthesizing nanowires right onto the electrodes in a well-organized fashion, the dissertation looked into protocols for maneuvering 1D nanostructure ensembles and manufacturing devices thereof. Exploiting nanowire ensemble en masse is attractive because this approach allows substrate recycling and simple device fabrication. One example of nanowire ensemble devices was capacitive chemical sensors, which had nanowire ensembles in the active sensing regions. These sensors showed pH sensitivities as high as the theoretical limit owing to their surface areas and high-density surface sites. Another example was flexible 2D devices created by transferring and then interfacing 1D structures with elastomer (polyurethane) films. Here, the mechanism of harvesting 1D structures was discussed with the help of simulation-based analysis, and electrical interfacing of the transferred structures was presented for creating flexible devices. In the last part of this dissertation, the nanobridging technique was evaluated from the practical point of view, and its perspectives were discussed thoroughly. The presented nanobridging technique seems to be uncompetitive compared to the matured and state-of-the-art modern microfabrication technology. However, the work carried out in this dissertation indicates that the bridging technique can help integrating heteroepitaxial nanowires on the Si platform. In particular, catalyst-free heteroepitaxial growth of nanowires on Si substrates can help the continuation of the microelectronics paradigm, 'Saller and Faster,' typically represented by 'Moore's Law.'