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Hot-Carrier Reliability of MOS VLSI Circuits

Hot-Carrier Reliability of MOS VLSI Circuits
Author: Yusuf Leblebici
Publisher: Springer Science & Business Media
Total Pages: 223
Release: 2012-12-06
Genre: Technology & Engineering
ISBN: 1461532507

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As the complexity and the density of VLSI chips increase with shrinking design rules, the evaluation of long-term reliability of MOS VLSI circuits is becoming an important problem. The assessment and improvement of reliability on the circuit level should be based on both the failure mode analysis and the basic understanding of the physical failure mechanisms observed in integrated circuits. Hot-carrier induced degrada tion of MOS transistor characteristics is one of the primary mechanisms affecting the long-term reliability of MOS VLSI circuits. It is likely to become even more important in future generation chips, since the down ward scaling of transistor dimensions without proportional scaling of the operating voltage aggravates this problem. A thorough understanding of the physical mechanisms leading to hot-carrier related degradation of MOS transistors is a prerequisite for accurate circuit reliability evaluation. It is also being recognized that important reliability concerns other than the post-manufacture reliability qualification need to be addressed rigorously early in the design phase. The development and use of accurate reliability simulation tools are therefore crucial for early assessment and improvement of circuit reliability : Once the long-term reliability of the circuit is estimated through simulation, the results can be compared with predetermined reliability specifications or limits. If the predicted reliability does not satisfy the requirements, appropriate design modifications may be carried out to improve the resistance of the devices to degradation.


VLSI Design for Reliability-Hot Carrier Effects

VLSI Design for Reliability-Hot Carrier Effects
Author:
Publisher:
Total Pages: 76
Release: 1993
Genre:
ISBN:

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This report describes the accomplishments during the contract period (June 28, to June 27, 1992) on the computer aided analysis of CMOS device and circuit degradation due to hot-carrier effects. The task involved four subtasks: (1) simulation of gate oxide degradation during long-term circuit operation; (2) determination of overall circuit performance after hot-electron stress; (3) probabilistic timing approach to hot-carrier-effect estimation; (4) parametric macromodeling of hot-carrier-induced degradation in MOS VLSI circuits. The first two parts are continued subtasks while the latter two are new subtasks. In order to simulate the reliability of MOS circuits, both the detailed model and the macromodel are used; the detailed model is used for accurate analysis of small circuits and the macromodel is used for very large circuits for computational efficiency. Since the hot-carrier-induced aging of MOS circuits is input-pattern dependent, an important task is to develop a computationally efficient probabilistic timing approach to hot-carrier-effect estimation without resorting to the Monte Carlo simulation. We have developed a new probabilistic approach that accounts for cumulative effects of all input waveform combinations in a single run. VLSI reliability, Hot-carrier effects, Computer aided design.


Hot-Carrier Effects in MOS Devices

Hot-Carrier Effects in MOS Devices
Author: Eiji Takeda
Publisher: Elsevier
Total Pages: 329
Release: 1995-11-28
Genre: Technology & Engineering
ISBN: 0080926223

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The exploding number of uses for ultrafast, ultrasmall integrated circuits has increased the importance of hot-carrier effects in manufacturing as well as for other technological applications. They are rapidly movingout of the research lab and into the real world. This book is derived from Dr. Takedas book in Japanese, Hot-Carrier Effects, (published in 1987 by Nikkei Business Publishers). However, the new book is much more than a translation. Takedas original work was a starting point for developing this much more complete and fundamental text on this increasingly important topic. The new work encompasses not only all the latest research and discoveries made in the fast-paced area of hot carriers, but also includes the basics of MOS devices, and the practical considerations related to hot carriers. Chapter one itself is a comprehensive review of MOS device physics which allows a reader with little background in MOS devices to pick up a sufficient amount of information to be able to follow the rest of the book The book is written to allow the reader to learn about MOS Device Reliability in a relatively short amount of time, making the texts detailed treatment of hot-carrier effects especially useful and instructive to both researchers and others with varyingamounts of experience in the field The logical organization of the book begins by discussing known principles, then progresses to empirical information and, finally, to practical solutions Provides the most complete review of device degradation mechanisms as well as drain engineering methods Contains the most extensive reference list on the subject


Prototype Rule-Based Reliability Analysis for VLSI Circuit Design

Prototype Rule-Based Reliability Analysis for VLSI Circuit Design
Author:
Publisher:
Total Pages: 82
Release: 1994
Genre:
ISBN:

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This report describes the development and application of parametric and geometry based macro-models of hot-carrier induced dynamic degradation in MOS VLSI circuits. Previously, a simulation based approach has been used for reliability analysis, but this is inefficient for reliability assessment of very large scale integrated circuits. Geometry-based macro-models for hot-carrier reliability estimation have been developed. The macro-models express hot-carrier damage as functions of designable parameters such as transistor size (W), output loading capacitance (C1) and the input signal slew rate (a). A prototype rule- based reliability diagnosis tool, iRULE, has been developed. This tool uses the macro-models for designing hot-carrier resistant circuits without the need for transient reliability simulations. This provides the ability to analyze very large circuits with more than one million transistors on a workstation in a short amount of time. This report also describes a fast timing reliability simulation tool, ILLIADS-R, that can accurately estimate hot-carrier degradation while providing several orders of magnitude speed up over traditional transistor-level circuit simulators. Reliability, Hot-carrier degradation, VLSI CMOS Circuits, Simulation.


Hot-Carrier Effects in MOS Devices

Hot-Carrier Effects in MOS Devices
Author: Eiji Takeda
Publisher: Academic Press
Total Pages: 329
Release: 1995
Genre: Juvenile Nonfiction
ISBN: 0126822409

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The exploding number of uses for ultrafast, ultrasmall integrated circuits has increased the importance of hot-carrier effects in manufacturing as well as for other technological applications. They are rapidly movingout of the research lab and into the real world. This book is derived from Dr. Takedas book in Japanese, Hot-Carrier Effects, (published in 1987 by Nikkei Business Publishers). However, the new book is much more than a translation. Takedas original work was a starting point for developing this much more complete and fundamental text on this increasingly important topic. The new work encompasses not only all the latest research and discoveries made in the fast-paced area of hot carriers, but also includes the basics of MOS devices, and the practical considerations related to hot carriers. Chapter one itself is a comprehensive review of MOS device physics which allows a reader with little background in MOS devices to pick up a sufficient amount of information to be able to follow the rest of the book The book is written to allow the reader to learn about MOS Device Reliability in a relatively short amount of time, making the texts detailed treatment of hot-carrier effects especially useful and instructive to both researchers and others with varyingamounts of experience in the field The logical organization of the book begins by discussing known principles, then progresses to empirical information and, finally, to practical solutions Provides the most complete review of device degradation mechanisms as well as drain engineering methods Contains the most extensive reference list on the subject


CMOS RF Modeling, Characterization and Applications

CMOS RF Modeling, Characterization and Applications
Author: M. Jamal Deen
Publisher: World Scientific
Total Pages: 426
Release: 2002
Genre: Science
ISBN: 9789810249052

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CMOS technology has now reached a state of evolution, in terms of both frequency and noise, where it is becoming a serious contender for radio frequency (RF) applications in the GHz range. Cutoff frequencies of about 50 GHz have been reported for 0.18 æm CMOS technology, and are expected to reach about 100 GHz when the feature size shrinks to 100 nm within a few years. This translates into CMOS circuit operating frequencies well into the GHz range, which covers the frequency range of many of today's popular wireless products, such as cell phones, GPS (Global Positioning System) and Bluetooth. Of course, the great interest in RF CMOS comes from the obvious advantages of CMOS technology in terms of production cost, high-level integration, and the ability to combine digital, analog and RF circuits on the same chip. This book discusses many of the challenges facing the CMOS RF circuit designer in terms of device modeling and characterization, which are crucial issues in circuit simulation and design.